SH7709S Datasheet, PDF (25/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

13.4.3 Precautions when Using RTC Module Standby ................................................... 426
Section 14 Serial Communication Interface (SCI)..................................................... 427
14.1 Overview ........................................................................................................................... 427
14.1.1 Features ................................................................................................................ 427
14.1.2 Block Diagram ..................................................................................................... 428
14.1.3 Pin Configuration ................................................................................................. 431
14.1.4 Register Configuration ......................................................................................... 432
14.2 Register Descriptions......................................................................................................... 432
14.2.1 Receive Shift Register (SCRSR) .......................................................................... 432
14.2.2 Receive Data Register (SCRDR).......................................................................... 433
14.2.3 Transmit Shift Register (SCTSR)......................................................................... 433
14.2.4 Transmit Data Register (SCTDR) ........................................................................ 434
14.2.5 Serial Mode Register (SCSMR) ........................................................................... 434
14.2.6 Serial Control Register (SCSCR) ......................................................................... 437
14.2.7 Serial Status Register (SCSSR) ............................................................................ 440
14.2.8 SC Port Control Register (SCPCR)/SC Port Data Register (SCPDR) ................. 444
14.2.9 Bit Rate Register (SCBRR) .................................................................................. 446
14.3 Operation........................................................................................................................... 453
14.3.1 Overview .............................................................................................................. 453
14.3.2 Operation in Asynchronous Mode........................................................................ 455
14.3.3 Multiprocessor Communication ........................................................................... 465
14.3.4 Synchronous Operation ........................................................................................ 474
14.4 SCI Interrupts .................................................................................................................... 484
14.5 Usage Notes....................................................................................................................... 485
Section 15 Smart Card Interface...................................................................................... 489
15.1 Overview ........................................................................................................................... 489
15.1.1 Features ................................................................................................................ 489
15.1.2 Block Diagram ..................................................................................................... 490
15.1.3 Pin Configuration ................................................................................................. 491
15.1.4 Smart Card Interface Registers............................................................................. 491
15.2 Register Descriptions......................................................................................................... 492
15.2.1 Smart Card Mode Register (SCSCMR)................................................................ 492
15.2.2 Serial Status Register (SCSSR) ............................................................................ 493
15.3 Operation........................................................................................................................... 494
15.3.1 Overview .............................................................................................................. 494
15.3.2 Pin Connections.................................................................................................... 495
15.3.3 Data Format.......................................................................................................... 496
15.3.4 Register Settings................................................................................................... 497
15.3.5 Clock .................................................................................................................... 498
15.3.6 Data Transmission and Reception ........................................................................ 501
15.4 Usage Notes....................................................................................................................... 507
Rev. 5.00, 09/03, page xxv of xliv