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| SH7709S Datasheet, PDF (245/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series | |||
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CKIO, CKIO2*6
CA
RESETP
STATUS
Standby
Normal*3
Standby*2
Undefined
Reset*1
WDT operation
0â10 Bcyc*4
2 Rcyc or more*5
Notes: 1.
2.
3.
4.
5.
6.
Reset: HH (STATUS1 high, STATUS0 high)
Standby: LH (STATUS1 low, STATUS0 high)
Normal: LL (STATUS1 low, STATUS0 low)
Bcyc: Bus clock cycle
Rcyc: EXTAL2 (32.768 kHz) cycle
The CKIO2 output is available only in clock modes 0, 1, and 2.
Figure 8.11 Hardware Standby Mode Timing
(When CA Goes Low during WDT Operation on Standby Mode Cancellation)
Rev. 5.00, 09/03, page 201 of 760
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