SH7709S Datasheet, PDF (435/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

12.1.3 Pin Configuration
Table 12.1 shows the pin configuration of the TMU.
Table 12.1 TMU Pin
Channel
Clock input/clock output
Pin I/O
TCLK I/O
Description
External clock input pin/input capture control input
pin/realtime clock (RTC) output pin
12.1.4 Register Configuration
Table 12.2 shows the TMU register configuration.
Table 12.2 TMU Registers
Channel Register
Abbre-
viation R/W
Common Timer output control
register
TOCR R/W
Timer start register
TSTR R/W
0
Timer constant register 0 TCOR0 R/W
Timer counter 0
TCNT0 R/W
Timer control register 0 TCR0 R/W
1
Timer constant register 1 TCOR1 R/W
Timer counter 1
TCNT1 R/W
Timer control register 1 TCR1 R/W
2
Timer constant register 2 TCOR2 R/W
Timer counter 2
TCNT2 R/W
Timer control register 2 TCR2 R/W
Input capture register 2 TCPR2 R
Note: * Initialized by power-on resets or manual resets.
Initial Value^* Address
Access
Size
H'00
H'FFFFFE90 8
H'00
H'FFFFFE92 8
H'FFFFFFFF H'FFFFFE94 32
H'FFFFFFFF H'FFFFFE98 32
H'0000
H'FFFFFE9C 16
H'FFFFFFFF H'FFFFFEA0 32
H'FFFFFFFF H'FFFFFEA4 32
H'0000
H'FFFFFEA8 16
H'FFFFFFFF H'FFFFFEAC 32
H'FFFFFFFF H'FFFFFEB0 32
H'0000
H'FFFFFEB4 16
Undefined H'FFFFFEB8 32
Rev. 5.00, 09/03, page 391 of 760