SH7709S Datasheet, PDF (60/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Number of Pins
FP-208C
FP-208E
BP-240A
176
A11
177
B11
178
D11
179
C11
180
B10
181
C10
182
D10
183
A10
184
C9
185
D9
186
B9
187
A9
188
D8
189
C8
190
B8
191
A8
192
D7
193
C7
194
B7
195
A7
196
D6
197
C6
Pin Name
I/O
Description
CTS2/IRQ5/SCPT[7] I
Transmit clear 2 / external interrupt
request / SCI input port
MCS[7]/PTC[7]/PINT[7] O / I/O / I Mask ROM chip select /
input/output port C / port interrupt
MCS[6]/PTC[6]/PINT[6] O / I/O / I Mask ROM chip select /
input/output port C / port interrupt
MCS[5]/PTC[5]/PINT[5] O / I/O / I Mask ROM chip select /
input/output port C / port interrupt
MCS[4]/PTC[4]/PINT[4] O / I/O / I Mask ROM chip select /
input/output port C / port interrupt
VssQ
—
Input/output power supply (0 V)
WAKEUP/PTD[3]
O / I/O
Standby mode interrupt request
notification / input/output port D
VccQ
—
Input/output power supply (3.3 V)
RESETOUT/PTD[2]
O / I/O Reset output / input/output port D
MCS[3]/PTC[3]/PINT[3] O / I/O / I Mask ROM chip select /
input/output port C / port interrupt
MCS[2]/PTC[2]/PINT[2] O / I/O / I Mask ROM chip select /
input/output port C / port interrupt
MCS[1]/PTC[1]/PINT[1] O / I/O / I Mask ROM chip select /
input/output port C / port interrupt
MCS[0]/PTC[0]/PINT[0] O / I/O / I Mask ROM chip select /
input/output port C / port interrupt
DRAK0/PTD[1]
O / I/O
DMA request acknowledge /
input/output port D
DRAK1/PTD[0]
O / I/O
DMA request acknowledge /
input/output port D
DREQ0/PTD[4]
I
DMA request / input port D
DREQ1/PTD[6]
I
DMA request / input port D
RESETP
I
Power-on reset request
CA
I
Chip activate (hardware standby
request signal)
MD3
I
Area 0 bus width setting
MD4
I
Area 0 bus width setting
MD5
I
Endian setting
Rev. 5.00, 09/03, page 16 of 760