SH7709S Datasheet, PDF (250/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

9.2.2 CPG Pin Configuration
Table 9.1 lists the CPG pins and their functions.
Table 9.1 CPG Pins and Functions
Pin Name
Symbol I/O
Mode control
pins
MD0
I
MD1
I
MD2
I
Crystal I/O pins XTAL
O
(clock input pins) _{EXTAL I}
Clock I/O pin
CKIO
I/O
Capacitor
CAP1
I
connection pins
for PLL
CAP2
I
Description
Set the clock operating mode
Connects a crystal oscillator
Connects a crystal oscillator. Also used to input an
external clock
Inputs or outputs an external clock
Connects capacitor for PLL circuit 1 operation
(recommended value 470 pF)
Connects capacitor for PLL circuit 2 operation
(recommended value 470 pF)
9.2.3 CPG Register Configuration
Table 9.2 shows the CPG register configuration.
Table 9.2 CPG Register
Register Name
Abbreviation R/W Initial Value Address
Access Size
Frequency control register FRQCR
R/W H'0102
H'FFFFFF80 16
Rev. 5.00, 09/03, page 206 of 760