SH7709S Datasheet, PDF (255/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

9.4 Register Descriptions
9.4.1 Frequency Control Register (FRQCR)
The frequency control register (FRQCR) is a 16-bit readable/writable register used to specify the
frequency multiplication ratio of PLL circuit 1 and the frequency division ratio of the internal
clock and the peripheral clock.
Only word access can be used on the FRQCR register.
FRQCR is initialized to H'0102 by a power-on reset, but retains its value in a manual reset and in
standby mode.
FRQCR:
Bit: 15
14
13
12
11
10
9
8
STC2 IFC2 PFC2
—
—
—
—
—
Initial value: 0
0
0
0
0
0
0
1
R/W: R/W R/W R/W
R
R
R
R
R
Bit: 7
—
Initial value: 0
R/W: R
6
5
4
3
2
1
0
—
STC1 STC0 IFC1 IFC0 PFC1 PFC0
0
0
0
0
0
1
0
R
R/W R/W R/W R/W R/W R/W
Bits 15, 5, and 4—Frequency Multiplication Ratio (STC): These bits specify the frequency
multiplication ratio of PLL circuit 1.
Bit 15: STC2 Bit 5: STC1
0
0
0
0
1
0
0
1
1
0
Except above value
Bit 4: STC0
0
1
0
0
1
Description
×1
×2
×3
×4
×6
Reserved
(Initial value)
Rev. 5.00, 09/03, page 211 of 760