SH7709S Datasheet, PDF (517/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Start Data
1 _{bit (ID2)}
Serial
data
0 D₀ D₁
MPIE
Stop Start Data
MPB bit bit (Data 2)
D₇ 1 1 0 D₀ D₁
Stop
MPB bit
1
D₇
0
1 ^{Idle (mark)}
state
RDRF
RDR
value
ID1
ID2
Data2
RXI interrupt request
(multiprocessor
interrupt) generated,
MPIE = 0
RXI interrupt handler
reads RDR data and
clears RDRF bit to 0
ID is that of station,
so reception continues
unchanged and data
is received by RXI
interrupt handler
MPIE bit
set to 1
again
Example: Own ID matches data
Figure 14.16 Example of SCI Receive Operation (cont)
(8-Bit Data with Multiprocessor Bit and One Stop Bit)
Rev. 5.00, 09/03, page 473 of 760