SH7709S Datasheet, PDF (535/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

15.1.3 Pin Configuration
Table 15.1 summarizes the smart card interface pins.
Table 15.1 Smart Card Interface Pins
Pin Name
Serial clock pin
Receive data pin
Transmit data pin
Abbreviation
SCK0
RxD0
TxD0
I/O
Output
Input
Output
Function
Clock output
Receive data input
Transmit data output
15.1.4 Smart Card Interface Registers
Table 15.2 summarizes the registers used by the smart card interface. The SCSMR, SCBRR,
SCSCR, SCTDR, and SCRDR registers are the same as for the normal SCI function. They are
described in section 14, Serial Communication Interface (SCI).
Table 15.2 Registers
Name
Abbreviation R/W Initial Value^*3 Address
Access Size
Serial mode register
SCSMR
R/W H'00
H'FFFFFE80 8
Bit rate register
SCBRR
R/W H'FF
H'FFFFFE82 8
Serial control register
SCSCR
R/W H'00
H'FFFFFE84 8
Transmit data register
Serial status register
SCTDR
SCSSR
R/W H'FF
R/(W)^*1 H'84
H'FFFFFE86 8
H'FFFFFE88 8
Receive data register
SCRDR
Smart card mode register SCSCMR
R
H'00
R/W H'00^*2
H'FFFFFE8A 8
H'FFFFFE8C 8
Notes: 1. Only 0 can be written, to clear the flags.
2. Bits 0, 2, and 3 are cleared. The value of the other bits is undefined.
3. Initialized by a power-on or manual reset.
Rev. 5.00, 09/03, page 491 of 760