SH7709S Datasheet, PDF (775/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Table A.6 Pin States (Burst ROM/Big Endian)
Pin
CS6 to CS2, CS0
RD
RD/WR
BS
RAS3U/PTE[2]
RAS3L/PTJ[0]
CASL/PTJ[2]
CASU/PTJ[3]
WE0/DQMLL
WE1/DQMLU/WE
WE2/DQMUL/
ICIORD/PTK[6]
WE3/DQMUU/
ICIOWR/PTK[7]
CE2A/PTE[4]
CE2B/PTE[5]
CKE/PTK[5]
WAIT
IOIS16/PTG[7]
A25 to A0
D7 to D0
D15 to D8
D31 to D16
8-Bit Bus Width
Byte/Word/Long-
word Access
Byte Access
(Address 2n)
Enabled
Enabled
R Low
Low
W—
—
R High
High
W—
—
Enabled
Enabled
High
High
High
High
High
High
High
High
R High
High
W—
—
R High
High
W—
—
R High
High
W—
—
R High
High
W—
—
High
High
High
High
Disabled
Enabled^*1
Disabled
Enabled^*1
Disabled
Disabled
Address
Address
Valid data
High-Z^*2
High-Z^*2
Invalid data
Valid data
High-Z^*2
16-Bit Bus Width
Byte Access Word/Longword
(Address 2n + 1)
Access
Enabled
Enabled
Low
Low
—
—
High
High
—
—
Enabled
Enabled
High
High
High
High
High
High
High
High
High
High
—
—
High
High
—
—
High
High
—
—
High
High
—
—
High
High
High
High
Disabled
Enabled^*1
Disabled
Enabled^*1
Disabled
Disabled
Address
Address
Valid data
Valid data
Invalid data
High-Z^*2
Valid data
High-Z^*2
Rev. 5.00, 09/03, page 731 of 760