SH7709S Datasheet, PDF (713/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

EXTAL input^*1
(CKIO input)
CKIO output^*2
(PLL output)
Internal clock
Multiplication rate modified
t_PLL2
Notes: 1. CKIO input in clock mode 7
2. PLL output in other than clock mode 7
Figure 23.10 PLL Synchronization Settling Time when Frequency Multiplication
Rate Modified
Rev. 5.00, 09/03, page 669 of 760