SH7709S Datasheet, PDF (620/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

18.3.7 Port G Control Register (PGCR)
Bit: 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PG7 PG7 PG6 PG6 PG5 PG5 PG4 PG4 PG3 PG3 PG2 PG2 PG1 PG1 PG0 PG0
MD1 MD0 MD1 MD0 MD1 MD0 MD1 MD0 MD1 MD0 MD1 MD0 MD1 MD0 MD1 MD0
Initial value: 1 0 1 0 1/0 0 1 0 1/0 0 1/0 0 1/0 0 1/0 0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
The port G control register (PGCR) is a 16-bit readable/writable register that selects the pin
functions. PGCR is initialized to H'AAAA (ASEMD0 = 1) or H'A200 (ASEMD0 = 0) by a power-
on reset, but is not initialized by a manual reset, in standby mode, or in sleep mode.
Bits 15 and 14—PG7 Mode 1 and 0 (PG7MD1, PG7MD0)
Bits 13 and 12—PG6 Mode 1 and 0 (PG6MD1, PG6MD0)
Bits 11 and 10—PG5 Mode 1 and 0 (PG5MD1, PG5MD0)
Bits 9 and 8—PG4 Mode 1 and 0 (PG4MD1, PG4MD0)
Bits 7 and 6—PG3 Mode 1 and 0 (PG3MD1, PG3MD0)
Bits 5 and 4—PG2 Mode 1 and 0 (PG2MD1, PG2MD0)
Bits 3 and 2—PG1 Mode 1 and 0 (PG1MD1, PG1MD0)
Bits 1 and 0—PG0 Mode 1 and 0 (PG0MD1, PG0MD0)
These bits select the pin functions and perform input pull-up MOS control.
Rev. 5.00, 09/03, page 576 of 760