SH7709S Datasheet, PDF (306/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Table 10.9 8-Bit External Device/Big-Endian Access and Data Alignment
Data Bus
Operation
D31– D23– D15–
D24 D16 D8 D7–D0
WE3,
DQMUU
Byte access at 0
—
—
—
Data 7–0
Byte access at 1
—
—
—
Data 7–0
Byte access at 2
—
—
—
Data 7–0
Byte access at 3
—
—
—
Data 7–0
Word access 1st time —
—
—
Data
at 0
at 0
15–8
2nd time —
—
—
Data
at 1
7–0
Word access 1st time —
—
—
Data
at 2
at 2
15–8
2nd time —
—
—
Data
at 3
7–0
Longword 1st time —
—
—
Data
access at 0 at 0
31–24
2nd time —
—
—
Data
at 1
23–16
3rd time —
—
—
Data
at 2
15–8
4th time —
—
—
Data
at 3
7–0
Strobe Signals
WE2,
DQMUL
WE1,
DQMLU
WE0,
DQMLL
Asserted
Asserted
Asserted
Asserted
Asserted
Asserted
Asserted
Asserted
Asserted
Asserted
Asserted
Asserted
Rev. 5.00, 09/03, page 262 of 760