SH7709S Datasheet, PDF (305/807 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series

Table 10.8 16-Bit External Device/Big-Endian Access and Data Alignment
Data Bus
Operation
D31– D23–
D24 D16 D15–D8 D7–D0
Byte access at 0
—
—
Data
—
7–0
Byte access at 1
—
—
—
Data
7–0
Byte access at 2
—
—
Data
—
7–0
Byte access at 3
—
—
—
Data
7–0
Word access at 0
—
—
Data
Data
15–8
7–0
Word access at 2
—
—
Data
Data
15–8
7–0
Longword 1st time —
—
Data
Data
access
at 0
31–24 23–16
at 0
2nd time —
—
Data
Data
at 2
15–8
7–0
WE3,
DQMUU
Strobe Signals
WE2,
DQMUL
WE1,
DQMLU
Asserted
Asserted
Asserted
Asserted
Asserted
Asserted
WE0,
DQMLL
—
Asserted
—
Asserted
Asserted
Asserted
Asserted
Asserted
Rev. 5.00, 09/03, page 261 of 760