SH7052 Datasheet, PDF (915/919 Pages) Renesas Technology Corp – SuperHTM RISC engine

Table B.3 Pin States (3)
Pin State
Type Pin Name
AUD AUDRST
Hardware Standby AUD Reset
AUD Module Standby (AUDRST = L)
Z
LI
Software Standby
AUDSRST = 1 /
Normal Operation
HI
AUDMD
Z
I
I
AUDATA0 Z
to
AUDATA3
AUDMD = H : I
AUDMD = H : I/O
AUDMD = L : HO Pulled up AUDMD = L : O
internally
AUDCK
Z
AUDMD = H : I
AUDMD = H : I/O
AUDSYNC Z
AUDMD = L : HO Pulled up AUDMD = L : O
internally
AUDMD = H : I
AUDMD = H : I/O
AUDMD = L : HO Pulled up AUDMD = L : O
internally
Legend:
—: Not initial value
I: Input
O: Output
H: High-level
L: Low-level
Z: High impedance
K: Input pins become high-impedance, output pins retain their state.
No Connection
Pulled down internally
Pulled up internally
Pulled up internally
Pulled up internally
Pulled up internally
Notes: 1. When the port impedance bit (HIZ) in the standby control register (SBYCR) is set to 1,
output pins become high-impedance.
2. When the CKHIZ bit in PFCRH is set to 1, becomes high-impedance unconditionally.
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