SH7052 Datasheet, PDF (120/919 Pages) Renesas Technology Corp – SuperHTM RISC engine

6.4.2 Stack after Interrupt Exception Processing
Figure 6.3 shows the stack after interrupt exception processing.
Address
4n–8
4n–4
4n
PC*¹
SR
32 bits
32 bits
SP*²
Notes: 1. PC: Start address of the next instruction (return destination instruction)
after the executing instruction
2. Always be certain that SP is a multiple of 4
Figure 6.3 Stack after Interrupt Exception Processing
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