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SH7052 Datasheet, PDF (593/919 Pages) Renesas Technology Corp – SuperHTM RISC engine
The operation of the A/D converter after ADF is set to 1 differs between single mode and scan
mode.
In single mode, after the A/D converter transfers the digital value to ADDR, ADF is set to 1
and the A/D converter enters the idle state. In scan mode (continuous scanning), after all the
set conversions end ADF is set to 1 and conversion is continued. For example, in the case of
12-channel scanning, ADF is set to 1 immediately after the end of conversion for AN8 to
AN11 (group 2).
In scan mode (single-cycle scanning), after all the set analog conversions end ADF is set to 1
and conversion is terminated. For example, in the case of 12-channel scanning, ADF is set to 1
immediately after the end of conversion for AN0 to AN11.
• Bit 6—A/D Interrupt Enable (ADIE): Enables or disables the A/D interrupt (ADI).
To prevent incorrect operation, ensure that the ADST bit in A/D control registers 0 and 1
(ADCR0) is cleared to 0 before switching the operating mode.
Bit 6:
ADIE
0
1
Description
A/D interrupt (ADI0) is disabled
A/D interrupt (ADI0) is enabled
(Initial value)
When A/D conversion ends and the ADF bit is set to 1, an A/D0 or A/D1 A/D interrupt (ADI0,
ADI1) will be generated If the ADIE bit is 1. ADI0 and ADI1 are cleared by clearing ADF or
ADIE to 0.
• Bits 5 and 4: A/D Mode 1 and 0 (ADM1, ADM0): These bits select the A/D conversion mode
from single mode, 4-channel scan mode, 8-channel scan mode, and 12-channel scan mode.
To prevent incorrect operation, ensure that the ADST bit in A/D control registers 1 and 0
(ADCR1, ADCR0) is cleared to 0 before switching the operating mode.
Bit 5:
ADM1
0
1
Bit 4:
ADM0
0
1
0
1
Description
Single mode
4-channel scan mode (analog groups 0, 1, 2)
8-channel scan mode (analog groups 0, 1)
12-channel scan mode (analog groups 0, 1, 2)
(Initial value)
When ADM1 and ADM0 are set to 00, single mode is set. In single mode, operation ends after
A/D conversion has been performed once on the analog channels selected with bits CH3 to
CH0 in ADCSR.
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