SH7052 Datasheet, PDF (770/919 Pages) Renesas Technology Corp – SuperHTM RISC engine

21.2.6 Block Configuration
The flash memory is divided into five 64 kB blocks, one 32 kB block, and eight 4 kB blocks.
Address H'5FFFF
64 kB
64 kB
64 kB
384 kB
64 kB
64 kB
32 kB
4 kB × 8
Address H'00000
Figure 21.7 Block Configuration
21.3 Pin Configuration
The flash memory is controlled by means of the pins shown in table 21.2.
Table 21.2 Pin Configuration
Pin Name
Reset
Flash write enable
Mode 2
Mode 1
Mode 0
Transmit data
Receive data
Abbreviation
RES
FWE
MD2
MD1
MD0
TxD1
RxD1
I/O
Input
Input
Input
Input
Input
Output
Input
Function
Reset
Flash program/erase protection by hardware
Sets SH7054F operating mode
Sets SH7054F operating mode
Sets SH7054F operating mode
Serial transmit data output
Serial receive data input
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