SH7052 Datasheet, PDF (772/919 Pages) Renesas Technology Corp – SuperHTM RISC engine

21.5 Register Descriptions
21.5.1 Flash Memory Control Register 1 (FLMCR1)
FLMCR1 is an 8-bit register used for flash memory operating mode control. Program-verify mode
or erase-verify mode is entered by setting SWE1 bit to 1 when FWE = 1, then setting the EV1 or
PV1 bit. Program mode is entered by setting SWE1 bit to 1 when FWE = 1, then setting the PSU1
bit, and finally setting the P1 bit. Erase mode is entered by setting SWE1 bit to 1 when FWE = 1,
then setting the ESU1 bit, and finally setting the E1 bit. FLMCR1 is initialized by a power-on
reset, and in hardware standby mode and software standby mode. Its initial value is H'80 when a
high level is input to the FWE pin, and H'00 when a low level is input. When on-chip flash
memory is disabled, a read will return H'00, and writes are invalid.
Writes are enabled only in the following cases: Writes to bit SWE1 of FLMCR1 enabled when
FWE = 1, to bits ESU1, PSU1, EV1, and PV1 when FWE = 1 and SWE1 = 1, to bit E1 when
FWE = 1, SWE1 = 1 and ESU1 = 1, and to bit P1 when FWE = 1, SWE1 = 1, and PSU1 = 1.
Bit: 7
6
5
4
3
2
1
0
FWE SWE1 ESU1 PSU1 EV1 PV1
E1
P1
Initial value: 1/0
0
0
0
0
0
0
0
R/W: R
R/W R/W R/W R/W R/W R/W R/W
• Bit 7—Flash Write Enable Bit (FWE): Sets hardware protection against flash memory
programming/erasing.
Bit 7: FWE
0
1
Description
When a low level is input to the FWE pin (hardware-protected state)
When a high level is input to the FWE pin
• Bit 6—Software Write Enable Bit 1 (SWE1): Enables or disables flash memory programming
and erasing. Set this bit when setting bits 5 to 0, bits 7 to 0 of EBR1, and bits 3 to 0 of EBR2.
Bit 6: SWE1
0
1
Description
Writes disabled
Writes enabled
[Setting condition]
When FWE = 1
(Initial value)
• Bit 5—Erase Setup Bit 1 (ESU1): Prepares for a transition to erase mode. Do not set the
SWE1, PSU1, EV1, PV1, E1, or P1 bit at the same time.
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