SH7052 Datasheet, PDF (219/919 Pages) Renesas Technology Corp – SuperHTM RISC engine

Block Diagram of Channel 0: Figure 10.2 shows a block diagram of ATU-II channel 0.
STR0
Prescaler 1
TI0A
TI0B
TI0C
TI0D
ICR0AH
ICR0BH
ICR0CH
ICR0DH
TCNT0H
ICR0AL
ICR0BL
ICR0CL
ICR0DL
TCNT0L
TIOR0
TIER0
ITVRR1
ITVRR2A
ITVRR2B
TSR0
I/O control
Control
logic
TRGOD
(OCR10B
compare-match signal)
A/D converter
trigger
Overflow interrupt
signal
Interval interrupt
Internal data bus and address bus
OSBR (ch1, ch2)
Figure 10.2 Block Diagram of Channel 0
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