SH7052 Datasheet, PDF (610/919 Pages) Renesas Technology Corp – SuperHTM RISC engine

Pφ
Address
Internal write
signal
Analog input
sampling signal
A/D converter
A/D conversion time (t_CONV)
A/D conversion start
delay time (t_D)
Analog input
sampling time
(t_SPL)
Write cycle
A/D synchronization time
(6 states) (up to 28 states)
ADST write timing
Idle
Sample-and-hold A/D conversion
ADF
Figure 16.6 A/D Conversion Timing
End of A/D
conversion
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