SH7052 Datasheet, PDF (17/919 Pages) Renesas Technology Corp – SuperHTM RISC engine

12.2.2 Timer Control/Status Register (TCSR) ................................................................ 416
12.2.3 Reset Control/Status Register (RSTCSR) ............................................................ 418
12.2.4 Register Access .................................................................................................... 419
12.3 Operation ........................................................................................................................... 420
12.3.1 Watchdog Timer Mode ........................................................................................ 420
12.3.2 Interval Timer Mode ............................................................................................ 422
12.3.3 Clearing Software Standby Mode ........................................................................ 422
12.3.4 Timing of Setting the Overflow Flag (OVF)........................................................ 423
12.3.5 Timing of Setting the Watchdog Timer Overflow Flag (WOVF)........................ 423
12.4 Usage Notes ....................................................................................................................... 424
12.4.1 TCNT Write and Increment Contention............................................................... 424
12.4.2 Changing CKS2 to CKS0 Bit Values................................................................... 424
12.4.3 Changing between Watchdog Timer/Interval Timer Modes................................ 424
12.4.4 System Reset by WDTOVF Signal...................................................................... 425
12.4.5 Internal Reset in Watchdog Timer Mode ............................................................. 425
12.4.6 Manual Reset in Watchdog Timer........................................................................ 425
Section 13 Compare Match Timer (CMT) ................................................................... 427
13.1 Overview............................................................................................................................ 427
13.1.1 Features ................................................................................................................ 427
13.1.2 Block Diagram...................................................................................................... 428
13.1.3 Register Configuration ......................................................................................... 429
13.2 Register Descriptions......................................................................................................... 430
13.2.1 Compare Match Timer Start Register (CMSTR) ................................................. 430
13.2.2 Compare Match Timer Control/Status Register (CMCSR).................................. 431
13.2.3 Compare Match Timer Counter (CMCNT).......................................................... 432
13.2.4 Compare Match Timer Constant Register (CMCOR).......................................... 433
13.3 Operation ........................................................................................................................... 433
13.3.1 Cyclic Count Operation........................................................................................ 433
13.3.2 CMCNT Count Timing ........................................................................................ 434
13.4 Interrupts............................................................................................................................ 434
13.4.1 Interrupt Sources and DTC Activation................................................................. 434
13.4.2 Compare Match Flag Set Timing ......................................................................... 434
13.4.3 Compare Match Flag Clear Timing...................................................................... 435
13.5 Usage Notes ....................................................................................................................... 436
13.5.1 Contention between CMCNT Write and Compare Match ................................... 436
13.5.2 Contention between CMCNT Word Write and Incrementation .......................... 437
13.5.3 Contention between CMCNT Byte Write and Incrementation ............................ 438
Section 14 Serial Communication Interface (SCI) .................................................... 439
14.1 Overview............................................................................................................................ 439
14.1.1 Features ................................................................................................................ 439
14.1.2 Block Diagram...................................................................................................... 440
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