SH7052 Datasheet, PDF (573/919 Pages) Renesas Technology Corp – SuperHTM RISC engine

Initialization (after Hardware Reset Only): These settings should be made while the HCAN is
in bit configuration mode.
1. IRR0 clearing
The reset interrupt flag (IRR0) is always set after a power-on reset or recovery from software
standby mode. As an HCAN interrupt is initiated immediately when interrupts are enabled,
IRR0 should be cleared.
2. HCAN pin port settings
To prevent erroneous identification of CAN bus data, HCAN pin port settings should be made
first. See section 15.3.2, HCAN Pin Port Settings, and section 18, Pin Function Controller, for
details.
3. Bit rate settings
Set values relating to the CAN bus communication speed and re-synchronization. See section
15.3.2, Bit Rate Settings, for details.
4. Mailbox transmit/receive settings
Each channel has one receive-only mailbox (mailbox 0) and 15 mailboxes that can be set for
reception. Thus a total of 32 mailboxes can be used for reception. To set a mailbox for
reception, set the corresponding bit to 1 in the mailbox configuration register (MBCR). The
initial setting for mailboxes is 0, designating transmission use. See section 15.3.2, Mailbox
Transmit/Receive Settings, for details.
5. Mailbox (RAM) initialization
As message control/data registers (MCx[x], MDx[x]) are configured in RAM, their initial
values after powering on are undefined, and so bit initialization is necessary. Write 0s or 1s to
the mailboxes. See section 15.3.2, Mailbox (Message Control/Data (MCx[x], MDx[x]) Initial
Settings, for details.
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