SH7052 Datasheet, PDF (774/919 Pages) Renesas Technology Corp – SuperHTM RISC engine

• Bit 1—Erase 1 (E1): Selects erase mode transition or clearing. Do not set the SWE1, ESU1,
PSU1, EV1, PV1, or P1 bit at the same time.
Bit 1: E1
0
1
Description
Erase mode cleared
Transition to erase mode
[Setting condition]
When FWE = 1, SWE1 = 1, and ESU1 = 1
(Initial value)
• Bit 0—Program 1 (P1): Selects program mode transition or clearing. Do not set the SWE1,
PSU1, ESU1, EV1, PV1, or E1 bit at the same time.
Bit 0: P1
0
1
Description
Program mode cleared
Transition to program mode
[Setting condition]
When FWE = 1, SWE1 = 1, and PSU1 = 1
(Initial value)
21.5.2 Flash Memory Control Register 2 (FLMCR2)
FLMCR2 is a status register that indicates the occurrence of an error during flash memory
programming or erasing. FLMCR2 is initialized to H'00 by a power-on reset and in hardware
standby mode. When on-chip flash memory is disabled, a read will return H'00 and writes are
invalid.
Bit: 7
6
5
4
3
2
1
0
FLER







Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
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