SH7052 Datasheet, PDF (352/919 Pages) Renesas Technology Corp – SuperHTM RISC engine

Noise Canceler Register 10 (NCR10): Noise canceler register 10 (NCR10) is an 8-bit
readable/writable register used to set the upper count limit of noise canceler counter 10H
(TCNT10H). TCNT10H is constantly compared with NCR10 during the count, and when a
compare-match occurs the TCNT10H counter is halted and input signal masking is released.
Bit: 7
6
5
4
3
2
1
0
Initial value: 1
1
1
1
1
1
1
1
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
NCR10 is initialized to H'FF by a power-on reset, and in hardware standby mode and software
standby mode.
Channel 10 Control Registers
There are four control registers in channel 10.
Channel
10
Abbreviation
TIOR10
TCR10
TSR10
TIER10
Function
Reload setting, counter correction setting, external input (TI10)
edge interval multiplier setting
GR compare-match setting
(Initial value H'00)
TCCLR10 counter clear source
Noise canceler function enabling/disabling selection
External input (TI10) edge selection
(Initial value H'00)
Input capture/compare-match status
(Initial value H'0000)
Input capture/compare-match interrupt request
enabling/disabling selection
(Initial value H'0000)
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