SH7052 Datasheet, PDF (594/919 Pages) Renesas Technology Corp – SuperHTM RISC engine

When ADM1 and ADM0 are set to 01, 4-channel scan mode is set. In scan mode, A/D
conversion is performed continuously on a number of channels. The channels on which A/D
conversion is to be performed in scan mode are set with bits CH3 to CH0 in ADCSR0. In 4-
channel scan mode, conversion is performed continuously on the channels in one of analog
groups 0 (AN0 to AN3), 1 (AN4 to AN7), 2 (AN8 to AN11).
When the ADCS bit is cleared to 0, selecting scanning of all channels within the group (AN0
to AN3, AN4 to AN7, AN8 to AN11), conversion is performed continuously, once only for
each channel within the group, and operation stops on completion of conversion for the last
(highest-numbered) channel.
When ADM1 and ADM0 are set to 10, 8-channel scan mode is set. In 8-channel scan mode,
conversion is performed continuously on the 8 channels in analog groups 0 (AN0 to AN3) and
1 (AN4 to AN7). When the ADCS bit is cleared to 0, selecting scanning of all channels within
the groups (AN0 to AN7), conversion is performed continuously, once only for each channel
within the groups, and operation stops on completion of conversion for the last (highest-
numbered) channel.
When ADM1 and ADM0 are set to 11, 12-channel scan mode is set. In 12-channel scan mode,
conversion is performed continuously on the 12 channels in analog groups 0 (AN0 to AN3), 1
(AN4 to AN7), and 2 (AN8 to AN11). When the ADCS bit is cleared to 0, selecting scanning
of all channels within the groups (AN0 to AN11), conversion is performed continuously, once
only for each channel within the groups, and operation stops on completion of conversion for
the last (highest-numbered) channel.
For details of the operation in single mode and scan mode, see section 16.4, Operation.
• Bits 3 to 0—Channel Select 3 to 0 (CH3 to CH0): These bits, together with the ADM1 and
ADM0 bits, select the analog input channels.
To prevent incorrect operation, ensure that the ADST bit in A/D control registers 1 and 0
(ADCR1, ADCR0) is cleared to 0 before changing the analog input channel selection.
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