SH7052 Datasheet, PDF (636/919 Pages) Renesas Technology Corp – SuperHTM RISC engine

Port A Control Register L (PACRL)
Bit: 15
14
13
12
11
10
9
8
— PA7MD — PA6MD — PA5MD — PA4MD
Initial value: 0
0
0
0
0
0
0
0
R/W: —
R/W
—
R/W
—
R/W
—
R/W
Bit: 7
6
5
4
3
2
1
0
— PA3MD — PA2MD — PA1MD — PA0MD
Initial value: 0
0
0
0
0
0
0
0
R/W: —
R/W
—
R/W
—
R/W
—
R/W
• Bit 15—Reserved: This bit always reads 0. The write value should always be 0.
• Bit 14—PA7 Mode Bit (PA7MD): Selects the function of pin PA7/TIO3D.
Bit 14: PA7MD
0
1
Description
General input/output (PA7)
ATU input capture input/output compare output (TIO3D)
(Initial value)
• Bit 13—Reserved: This bit always reads 0. The write value should always be 0.
• Bit 12—PA6 Mode Bit (PA6MD): Selects the function of pin PA6/TIO3C.
Bit 12: PA6MD
0
1
Description
General input/output (PA6)
ATU input capture input/output compare output (TIO3C)
(Initial value)
• Bit 11—Reserved: This bit always reads 0. The write value should always be 0.
• Bit 10—PA5 Mode Bit (PA5MD): Selects the function of pin PA5/TIO3B.
Bit 10: PA5MD
0
1
Description
General input/output (PA5)
ATU input capture input/output compare output (TIO3B)
(Initial value)
• Bit 9—Reserved: This bit always reads 0. The write value should always be 0.
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