SH7052 Datasheet, PDF (540/919 Pages) Renesas Technology Corp – SuperHTM RISC engine

15.2.7 Transmit Acknowledge Register (TXACK)
The transmit acknowledge register (TXACK) is a 16-bit readable/writable register containing
status flags that indicate normal transmission of mailbox (buffer) transmit messages.
Bit: 15
14
13
12
11
10
9
8
TXACK7 TXACK6 TXACK5 TXACK4 TXACK3 TXACK2 TXACK1 —
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W
R
Bit: 7
6
5
4
3
2
1
0
TXACK15 TXACK14 TXACK13 TXACK12 TXACK11 TXACK10 TXACK9 TXACK8
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
• Bits 15 to 9 and 7 to 0—Transmit Acknowledge Register (TXACK7 to 1, TXACK15 to 8):
These bits indicate that a transmit message in the corresponding HCAN mailbox (buffer) has
been transmitted normally.
Bit x: TXACKx
0
1
Description
[Clearing condition]
Writing 1
(Initial value)
Completion of message transmission for corresponding mailbox
• Bit 8—Reserved: This bit always reads 0. The write value should always be 0.
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