SH7052 Datasheet, PDF (226/919 Pages) Renesas Technology Corp – SuperHTM RISC engine

Block Diagram of Channel 10: Figure 10.9 shows a block diagram of ATU-II channel 10.
STR10
Prescaler 4
TI10
ICR10AH
OCR10AH
TCNT10AH
ICR10AL
OCR10AL
TCNT10AL
OCR10B
TCNT10B
RLD10C
TCNT10C
TCNT10D
TCNT10E
TCNT10F
GR10G
TCNT10G
NCR10
TCNT10H
TCCLR10
TIOR10
TCR10
TIER10
TSR10
I/O control
Control
logic
Internal data bus and address bus
TRG1A, 1B, 2A, 2B
(Counter clear trigger)
TRG0D
(OCR10B compare-
match signal)
Frequency multipli-
cation clock
Frequency multipli-
cation correction clock
Output compare
interrupts × 2
Input capture /
output compare
interrupt × 1
Figure 10.9 Block Diagram of Channel 10
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