SH7619 Datasheet, PDF (820/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Item
• How to Use (Example)
Figure 22.11 Example of
Connection with a Pulse
Transformer (RJ45)
Page Revision (See Manual for Details)
661 Amended, Added
Step
Description
662
1
Select Tx100 mode. (This operation can be omitted if Tx100 full-
duplex or Tx100 half-duplex mode has been selected by auto-
negotiation,)*
2
Start register write mode setting.
3
Register write mode setting (continued)
4
Register write mode setting (continued)
5
Register write mode setting (continued)
6
Finish register write mode setting.
7
Write the setting value. (The initial value of this register is H'81C8.
Change the setting as necessary.)
8
Validate the setting value (always write this value).
9
Terminate the register write mode (return to normal mode).
Note: The setting of this register is initialized during the auto-negotiation process
or when the PHY module is reset (including a system reset of the LSI).
Accordingly, when waveform adjustment is to be performed by this register,
the above steps must be carried out every time the register is initialized.
Amended
PVCC
R3
R2
R1
8nF/16V
Figure 25.16 Synchronous
DRAM Single Read Bus Cycle
(Auto-Precharge,
CAS Latency = 2, WTRCD = 0
Cycle, WTRP = 0 Cycle)
Figure 25.17 Synchronous
DRAM Single Read Bus Cycle
(Auto-Precharge,
CAS Latency = 2, WTRCD = 1
Cycle, WTRP = 1 Cycle)
C3
C4
PVSS PVSS
733 Amended
CKIO
Tr
Tc1
Tcw
Td1
A25 to A0
tAD1
tAD1
Row address
Column address
Tde
tAD1
734
Amended
CKIO
A25 to A0
Tr
Trw
Tc1
Tcw
tAD1
Row address
tAD1
Column address
Td1
Tde
Tap
tAD1
Rev. 5.00 Mar. 15, 2007 Page 782 of 794
REJ09B0237-0500