SH7619 Datasheet, PDF (538/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 16 Serial I/O with FIFO (SIOF)
No.
Time Chart
Start
1
Make settings for DMA.
SIOF/DMA Setting
Complete setting for DMA before making settings
for the SIOF.
SIOF/DMA Operation
2 Set SISCR, SIFCTR, SPICR, and SIIER.
3
Set the SCKE bit in SICTR to 1.
4
Set the FSE bit in SICTR to 1.
Set the TXE bit in SICTR to 1.
5
TDREQ=1?
No
Yes
6
DMA transfer (Set the SITDR register.)
Set the serial clock, threshold values for FIFO,
and TDMAE = 1
Start baud rate generator operation.
Initialize the frame in the SIOF (ie, initialize the
state of signal SS0), and enable transmission.
[Note] In SPI mode, registers SIMDR, SITDAR, SIRDAR,
and SICDAR should be set to their initial values.
[Note] Serial clock will not be output form the pin until
communication is actually started.
[Note] Communication is actually started after SITDR
has been written.
Set the data for transmission.
7
Synchronously to SS0, output the
contents of SITDR from MOSI.
Executes transmission.
8
No
Transfer complete?
Yes
For example, in the DMA transfer end interrupt
service routine, check SISTR.TFEMP (transmit
FIFO empty) and ensure completion of
communication by using a wait loop.
When the DMA transfr end interrupt is used, clear the IE
bit in DMA.CHCRn before the execution returns from the
interrupt service routine.
9
Clear the TXE bit in SICTR to 0.
Disable transmission.
Transmission ends.
10
Clear the FSE bit in SICTR to 0.
To be prepared for the transmission/reception that
is resumed later, set FSE = 0 to synchronize
the frame in this LSI.
Set BPRS = 00000 and BRDV = 111
in the SISCR register.
11
Apply a pulse to bit TxRST in the
SICTR register (0->1->0 input).
To be prepared for the transmission/reception that
is resumed later, initialize inside the baud rate
generator.
Set the SISCR register to set
the baud rate again.
If communication is not to be resumed
Change
No
(branching to No), no further setting is needed.
12
communication mode?
To return to the same communication mode,
Yes
End go back to setting of FSE at step 4 of this flowchart.
13
With FSE=0, TXE=0, and RXE=0
held, start setting other bits.
Go on to 'Start' of the corresponding flowchart.
Figure 16.26 SPI Transmission Operation (Example of Half-Duplex Transmission by DMA
with TDMAE = 1)
Rev. 5.00 Mar. 15, 2007 Page 500 of 794
REJ09B0237-0500