SH7619 Datasheet, PDF (385/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 13 Direct Memory Access Controller (DMAC)
• Single Address Mode
In single address mode, either the transfer source or transfer destination peripheral device is
accessed (selected) by means of the DACK signal, and the other device is accessed by an
address. In this mode, the DMAC performs one DMA transfer in one bus cycle, accessing one
of the external devices by outputting the DACK transfer request acknowledge signal to it, and
at the same time outputting an address to the other device involved in the transfer. For
example, in the case of transfer between external memory and an external device with DACK
shown in figure 13.7, when the external device outputs data to the data bus, that data is written
to the external memory in the same bus cycle.
This LSI
External address bus External data bus
DMAC
External
memory
External device
with DACK
Data flow
DACK
DREQ
Figure 13.7 Data Flow in Single Address Mode
Two kinds of transfer are possible in single address mode: (1) transfer between an external
device with DACK and a memory-mapped external device, and (2) transfer between an
external device with DACK and external memory. In both cases, only the external request
signal (DREQ) is used for transfer requests.
Rev. 5.00 Mar. 15, 2007 Page 347 of 794
REJ09B0237-0500