SH7619 Datasheet, PDF (667/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 22 Ethernet Physical Layer Transceiver (PHY)
#define QuatA 6 // =25cyc/4 (Please define to keep, “MDC cycle > 400ns”)
void
phy_reg_read( unsigned short *data )
{
long
i;
long
j;
unsigned short
reg_data;
reg_data = 0;
i = 16;
//Preceding TA cycle set PIR 0x00000000
while( i > 0 )
{
for (j=1;j<=QuatA;j++) REG_PIR = 0x00000000;
for (j=1;j<=QuatA;j++) REG_PIR = 0x00000001;
reg_data <<= 1;
reg_data |= (REG_PIR & 0x00000008) >> 3; /* MDI read*/
for (j=1;j<=QuatA;j++) REG_PIR = 0x00000001;
for (j=1;j<=QuatA;j++) REG_PIR = 0x00000000;
i--;
}
*data = reg_data;
}
void
phy_reg_write( unsigned short data )
{
long
i;
i = 16;
while( i > 0 )
{
if( (data & 0x8000) == 0 )
{
mii_write_0();
Rev. 5.00 Mar. 15, 2007 Page 629 of 794
REJ09B0237-0500