SH7619 Datasheet, PDF (250/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 8 Clock Pulse Generator (CPG)
Notes: 1. Pins MD2 to MD0 should be set during the operation before the mode change or during
software standby mode before requesting an interrupt.
2. Clear the STBY bit in STBCR in the exception handling routine for the interrupt in
step 6. Otherwise, software standby mode is entered again. For details, see section
10.5.2, Canceling Software Standby Mode.
3. Once bits STC2 to STC0 are changed, the clock is not switched to the specified clock
even if only bits PFC2 to PFC0 are changed. When bits STC2 to STC0 are changed
after the MDCHG bit has been set to 1, the FRQCR setting must not be made until the
clock mode is changed.
Rev. 5.00 Mar. 15, 2007 Page 212 of 794
REJ09B0237-0500