SH7619 Datasheet, PDF (244/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 8 Clock Pulse Generator (CPG)
Cautions:
1. The internal clock frequency is the product of the frequency of the CKIO pin and the
frequency multiplication ratio of PLL circuit 1.
2. The peripheral clock frequency is the product of the frequency of the CKIO pin, the frequency
multiplication ratio of PLL circuit 1, and the division ratio of divider 1.
Do not set the peripheral clock frequency lower than the CKIO pin frequency.
3. The PHY clock frequency is the product of the frequency of the CKIO pin, the frequency
multiplication ratio of PLL circuit 1, and the division ratio of divider 2.
4. ×1, ×1/2, or ×1/4 can be used as the division ratio of divider 1. This is set by the frequency
control register.
5. The division ratio of divider 2 is selected from ×1, ×1/2, ×1/4, or ×1/5. This is set by the PHY
clock frequency control register.
6. The output frequency of PLL circuit 1 is the product of the frequency of the CKIO pin and the
multiplication ratio of PLL circuit 1. It is set by the frequency control register.
7. The bus clock frequency is always set to be equal to the frequency of the CKIO pin.
8. The clock mode, the FRQCR register value, and the frequency of the input clock should be
decided to satisfy the range of operating frequency specified in section 25, Electrical
Characteristics, with referring to table 8.3.
8.4 Register Descriptions
The CPG has the following registers.
For details on the addresses of these registers and the states of these registers in each processing
state, see section 24, List of Registers.
• Frequency control register (FRQCR)
• PHY clock frequency control register (MCLKCR)
8.4.1 Frequency Control Register (FRQCR)
FRQCR is a 16-bit readable/writable register that specifies whether a clock is output from the
CKIO pin in standby mode, the frequency multiplication ratio of PLL circuit 1, and the frequency
division ratio of the peripheral clock. Only word access can be used on FRQCR.
FRQCR is initialized by a power-on reset due to the external input signal. However, it is not
initialized by a power-on reset due to a WDT overflow.
Rev. 5.00 Mar. 15, 2007 Page 206 of 794
REJ09B0237-0500