SH7619 Datasheet, PDF (347/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 12 Ethernet Controller Direct Memory Access Controller (E-DMAC)
(a) Countermeasure by monitoring of the transmit descriptor in the processing of
interrupts other than the frame transmit complete (TC) interrupt
1. Prepare multiple transmit descriptors so that multiple frames can be transmitted.
2. Provide a "condition flag" for use in step 5 and by interrupt handlers, and then turn off this
flag.
This flag serves as a condition flag into which the TACT bits of transmit descriptors are read
out.
3. After setting the frame for transmission in the first descriptor, start transmission by setting bit
0 (TR) in the E-DMAC transmit request register (EDTRR).
4. Before setting the next frame for transmission in the transmit descriptor (when another
transmission task arises), check the TACT bit in the corresponding transmit descriptor.
5. If the TACT bit is clear, set the frame for transmission in the corresponding transmit descriptor
and start transmission by setting the TR bit in EDTRR. If the TACT bit is set to 1, turn on the
condition flag and make an OS service call (e.g. to acquire the semaphore) to place the
transmission task in the waiting state.
Note: Before setting the TR bit in EDTRR, always read the TR bit and make sure that TR = 0.
6. Wait until the transmission task leaves the waiting state. There are two conditions for making
the OS service call (e.g. returning the semaphore) from the interrupt handler to take the task
out of the waiting state.
 Generation of a TC interrupt
 Generation of an interrupt other than the TC interrupt while the condition flag is on and
TACT = 0. Elimination of unwanted processing by checking the TACT bit is only possible
when the condition flag is on. The condition flag should be turned off after the task has left
the waiting state.
7. When the transmission task has left the waiting state and entered execution, set the transmit
frame in the corresponding transmit descriptor and then set the TR bit in EDTRR to start
transmission.
Rev. 5.00 Mar. 15, 2007 Page 309 of 794
REJ09B0237-0500