SH7619 Datasheet, PDF (710/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 23 PHY Interface (PHY-IF)
23.2.5 PHY-IF status Register (PHYIFSR)
PHYIFSR is a 16-bit read-only register that shows the status of the on-chip PHY module.
PHYIFSR is initialized by power-on-reset.
Bit
Bit name
15
co_pwruprst
14 to 0 
Initial value R/W
1
R
(Ref.
Description)
0
R
Description
Power Up Reset
This bit goes to "1" only on detection of Power up
of the on-chip PHY power (Vcc1A to Vcc3A) and
stays at "1" for 21 ms, automatically.
Reserved.
These bits are always read as 0. The write value
should always be 0.
Rev. 5.00 Mar. 15, 2007 Page 672 of 794
REJ09B0237-0500