SH7619 Datasheet, PDF (349/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 12 Ethernet Controller Direct Memory Access Controller (E-DMAC)
(b) Countermeasure by adding timeout processing
1. Prepare multiple transmit descriptors so that multiple frames can be transmitted.
2. After setting the descriptors, set bit 0 (TR) in the E-DMAC transmit request register (EDTRR)
to start transmission.
3. Before setting the next frame for transmission in the transmit descriptor (when a transmission
task arises), check the TACT bit in the corresponding transmit descriptor.
4. If the TACT bit is clear, set the frame for transmission in the corresponding transmit descriptor
and set the TR bit in EDTRR to start transmission. If the TACT bit is set to 1, place the
transmission task in a waiting state by making an OS service call of a routine with a timeout
function (e.g. acquire a semaphore that has a timeout).
Note: Before setting the TR bit in EDTRR, always read the TR bit and make sure that TR = 0.
5. When the transmission task has left the waiting state and entered the execution state within the
time limit, set the frame for transmission in the corresponding transmit descriptor and then set
the TR bit in EDTRR to start transmission. Taking the transmission task out of the waiting
state should be done by the interrupt handler when the TC interrupt is generated.
6. When the timeout limit is reached, check the TACT bit in the corresponding transmit
descriptor. If the TACT bit is clear, set the frame for transmission in the corresponding
transmit descriptor and set the TR bit in EDTRR to start transmission. If the TACT bit is set to
1, place the transmission task in a waiting state by making an OS service call of a routine with
a timeout function, or execute a software reset to initialize all of the modules associated with
Ethernet functionality.
Rev. 5.00 Mar. 15, 2007 Page 311 of 794
REJ09B0237-0500