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SH7619 Datasheet, PDF (774/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series
Section 25 Electrical Characteristics
CKIO
A25 to A0
A11*1
Td1
Td2
Td3
Td4
Tr
Trw
Tc1
Tc2
Tc3
Tc4
Tde
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
Row address
Column
address
Column Column
address address
Column
address
tAD1
tAD1
tAD1
tAD1
Read command
Read A command
CSn
RD/WR
RAS
CAS
DQMxx
tCSD1
tRWD
tRASD
tRASD
tCASD
tDQMD
tCSD1
tRWD
tCASD
tDQMD
D15 to D0
BS
CKE
tDACD
DACKn*2
t
BSD
(High)
tRDS2
tRDH2
t
BSD
tRDS2
tRDH2
tDACD
Notes: * 1. Address pins connected to A10 in SDRAM
2. DACKn is the waveform when active low is selected.
Figure 25.19 Synchronous DRAM Burst Read Bus Cycle (Single Read × 4)
(Auto-Precharge, CAS Latency = 2, WTRCD = 1 Cycle, WTRP = 0 Cycle)
Rev. 5.00 Mar. 15, 2007 Page 736 of 794
REJ09B0237-0500