SH7619 Datasheet, PDF (689/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 22 Ethernet Physical Layer Transceiver (PHY)
(6) Half-duplex and Full-duplex
Half-duplex operation conforms to CSMA/CD (Carrier Sense Multiple Access/Collision Detect)
protocol that deals with the network traffic and collision. In this mode, the carrier signal (CRS)
supports either of transmit/receive operation. Receiving data during PHY transmission causes a
collision.
In full-duplex mode, the PHY performs transmit and receive simultaneously. In this mode, the
CRS supports only receive. The CSMA/CD protocol is not applied and the collision detection is
disabled.
22.10 Miscellaneous Functions
(1) Carrier Sense
The carrier sense is output on CRS (to EtherC). CRS is a signal defined by the MII specification in
the IEEE 802.3u standard. The PHY asserts CRS based only on receive activity whenever the
PHY is either in repeater mode or full-duplex mode. Otherwise the PHY asserts CRS based on
either transmit or receive activity.
The carrier sense logic uses the encoded, unscrambled data to determine carrier activity status. It
activates carrier sense with the detection of 2 non-contiguous zeros within any 10 bit span. Carrier
sense terminates if a span of 10 consecutive ones is detected before a /J/K/ Start-of Stream
Delimiter pair. If an SSD pair is detected, carrier sense is asserted until either /T/R/ End-of-Stream
Delimiter pair or a pair of IDLE symbols is detected. Carrier is negated after the /T/ symbol or the
first IDLE. If /T/ is not followed by /R/, then carrier is maintained. Carrier is treated similarly for
IDLE followed by some non-IDLE symbol.
(2) Collision Detect
A collision is the occurrence of simultaneous transmit and receive operations. The CO_COL
output is asserted to indicate that a collision has been detected. CO_COL remains active for the
duration of the collision. CO_COL is changed asynchronously to both CO_RX_CLK and
TX_CLK. The CO_COL output becomes inactive during full duplex mode.
CO_COL may be tested by setting register 0, bit 7 high. This enables the collision test. CO_COL
will be asserted within 512 bit times of CO_TX_EN rising and will be de-asserted within 4 bit
times of CO_TX_EN falling.
In 10M mode, CO_COL pulses for approximately 10 bit times (1us), 2us after each transmitted
packet (de-assertion of CO_TX_EN). This is the Signal Quality Error (SQE) signal and indicates
that the transmission was successful.
Rev. 5.00 Mar. 15, 2007 Page 651 of 794
REJ09B0237-0500