SH7619 Datasheet, PDF (698/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 22 Ethernet Physical Layer Transceiver (PHY)
Initial
Bit
Bit Name Value R/W
Description
8
D1CMP 1
R/W
These bits adjust the latter half of the slope (from half
7
D0CMP 1
R/W
to the maximum amplitude).
00: Three steps up
01: Two steps up
10: One step up
11: Regular
6
D2A
1
R/W
These bits adjust the amplitude.
5
D1A
0
R/W
000: Amp 4 stp+
4
D0A
0
R/W
001: Amp 3 stp+
010: Amp 2 stp+
011: Amp 1 stp+
100: Regular
101: Amp 1 stp-
110: Amp 2 stp-
111: Amp 3 stp-
3
DASL
1
R/W
These bits adjust the first half of the slope (from 0 V to
2
DBSL
0
R/W
half the amplitude).
00: One step up
01: One step down
10: Regular
11: Two steps down
1, 0

0
RO
Reserved
The write value should always be 0.
Rev. 5.00 Mar. 15, 2007 Page 660 of 794
REJ09B0237-0500