SH7619 Datasheet, PDF (16/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

14.5.1
14.5.2
14.5.3
14.5.4
Conflict between Write and Compare-Match Processes of CMCNT ............... 369
Conflict between Word-Write and Count-Up Processes of CMCNT ............... 370
Conflict between Byte-Write and Count-Up Processes of CMCNT................. 371
Conflict between Write Processes to CMCNT with the Counting Stopped
and CMCOR ..................................................................................................... 371
Section 15 Serial Communication Interface with FIFO (SCIF).......................... 373
15.1 Overview .......................................................................................................................... 373
15.1.1 Features............................................................................................................. 373
15.2 Pin Configuration.............................................................................................................. 376
15.3 Register Description ......................................................................................................... 377
15.3.1 Receive Shift Register (SCRSR) ...................................................................... 378
15.3.2 Receive FIFO Data Register (SCFRDR) .......................................................... 378
15.3.3 Transmit Shift Register (SCTSR) ..................................................................... 378
15.3.4 Transmit FIFO Data Register (SCFTDR)......................................................... 379
15.3.5 Serial Mode Register (SCSMR)........................................................................ 379
15.3.6 Serial Control Register (SCSCR)...................................................................... 382
15.3.7 Serial Status Register (SCFSR) ........................................................................ 386
15.3.8 Bit Rate Register (SCBRR) .............................................................................. 394
15.3.9 FIFO Control Register (SCFCR) ...................................................................... 401
15.3.10 FIFO Data Count Register (SCFDR)................................................................ 404
15.3.11 Serial Port Register (SCSPTR) ......................................................................... 405
15.3.12 Line Status Register (SCLSR) .......................................................................... 409
15.4 Operation .......................................................................................................................... 410
15.4.1 Overview .......................................................................................................... 410
15.4.2 Operation in Asynchronous Mode .................................................................... 412
15.4.3 Synchronous Mode ........................................................................................... 423
15.5 SCIF Interrupts ................................................................................................................. 431
15.6 Serial Port Register (SCSPTR) and SCIF Pins ................................................................. 432
15.7 Usage Notes ...................................................................................................................... 436
Section 16 Serial I/O with FIFO (SIOF) ............................................................. 441
16.1 Features............................................................................................................................. 441
16.2 Input/Output Pins.............................................................................................................. 443
16.3 Register Descriptions........................................................................................................ 444
16.3.1 Mode Register (SIMDR) .................................................................................. 445
16.3.2 Control Register (SICTR)................................................................................. 448
16.3.3 Transmit Data Register (SITDR) ...................................................................... 451
16.3.4 Receive Data Register (SIRDR) ....................................................................... 452
16.3.5 Transmit Control Data Register (SITCR) ......................................................... 453
Rev. 5.00 Mar. 15, 2007 Page xvi of xxxviii