SH7619 Datasheet, PDF (720/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 24 List of Registers
Register Name
Number
Abbreviation of Bits
E-DMAC operation control register EDOCR
32
Flow control FIFO threshold register FCFTR
32
Transmit Interrupt setting register
TRIMD
32
Receive buffer write address register RBWAR
32
Receive descriptor fetch address
RDFAR
32
register
Transmit buffer read address register TBRAR
32
Transmit descriptor fetch address TDFAR
32
register
EtherC mode register
ECMR
32
EtherC status register
ECSR
32
EtherC interrupt permission register ECSIPR
32
PHY interface register
PIR
32
MAC address high register
MAHR
32
MAC address low register
MALR
32
Receive frame length register
RFLR
32
PHY status register
PSR
32
Transmit retry over counter register TROCR
32
Delayed collision detect counter
CDCR
32
register
Lost carrier counter register
LCCR
32
Carrier not detect counter register CNDCR
32
CRC error frame receive counter
CEFCR
32
register
Frame receive error counter register FRECR
32
Too-short frame receive counter
TSFRCR
32
register
Too-long frame receive counter
register
TLFRCR
32
Residual-bit frame counter register RFCR
32
Multicast address frame receive
MAFCR
32
counter register
IPG setting register
IPGR
32
Address
H'FB000030
H'FB000034
H'FB00003C
H'FB000040
H'FB000044
H'FB00004C
H'FB000050
H'FB000160
H'FB000164
H'FB000168
H'FB00016C
H'FB000170
H'FB000174
H'FB000178
H'FB00017C
H'FB000180
H'FB000184
H'FB000188
H'FB00018C
H'FB000194
H'FB000198
H'FB00019C
H'FB0001A0
H'FB0001A4
H'FB0001A8
H'FB0001B4
Module Access Size
E-DMAC 32
E-DMAC 32
E-DMAC 32
E-DMAC 32
E-DMAC 32
E-DMAC 32
E-DMAC 32
EtherC 32
EtherC 32
EtherC 32
EtherC 32
EtherC 32
EtherC 32
EtherC 32
EtherC 32
EtherC 32
EtherC 32
EtherC 32
EtherC 32
EtherC 32
EtherC 32
EtherC 32
EtherC 32
EtherC 32
EtherC 32
EtherC 32
Rev. 5.00 Mar. 15, 2007 Page 682 of 794
REJ09B0237-0500