SH7619 Datasheet, PDF (521/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 16 Serial I/O with FIFO (SIOF)
16.4.7 Transmit and Receive Procedures
Transmission in Master Mode: Figure 16.9 shows an example of settings and operation for
master mode transmission.
No.
Flow Chart
Start
1
Set SIMDR, SISCR, SITDAR,
SIRDAR, SICDAR, and SIFCTR
2
Set the SCKE bit in SICTR to 1
3
Start SIOFSCK output
4
Set the FSE and TXE bits
in SICTR to 1
SIOF Settings
SIOF Operation
Set operating mode, serial clock,
slot positions for transmit/receive
data, slot position for control data,
and FIFO request threshold value
Set operation start for baud rate
generator
Output serial clock
Set the start for frame synchronous
signal output and enable
transmission
Output frame synchronous
signal and issue transmit
transfer request*
5
TDREQ = 1? ^No
Yes
6
Set SITDR
7
Transmit SITDR from SIOFTXD
synchronously with SIOFSYNC
Set transmit data
Transmit
Transfer
No
ended?
8
Yes
Clear the TXE bit in SICTR to 0
Set to disable transmission
End transmission
End
Note: * When interrupts due to transmit data underflow are enabled, after setting the no. 6 transmit data, the
TXE bit should be set to 1.
Figure 16.9 Example of Transmit Operation in Master Mode
Rev. 5.00 Mar. 15, 2007 Page 483 of 794
REJ09B0237-0500