SH7619 Datasheet, PDF (27/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Figure 14.7 Conflict between Byte-Write and Count-Up Processes of CMCNT ....................... 371
Section 15 Serial Communication Interface with FIFO (SCIF)
Figure 15.1 Block Diagram of SCIF........................................................................................... 375
Figure 15.2 Example of Data Format in Asynchronous Communication
(8-Bit Data with Parity and Two Stop Bits) ........................................................... 412
Figure 15.3 Sample Flowchart for SCIF Initialization ............................................................... 415
Figure 15.4 Sample Flowchart for Transmitting Serial Data ...................................................... 416
Figure 15.5 Example of Transmit Operation (8-Bit Data, Parity, One Stop Bit)........................ 418
Figure 15.6 Example of Operation Using Modem Control (CTS).............................................. 418
Figure 15.7 Sample Flowchart for Receiving Serial Data (1)..................................................... 419
Figure 15.8 Sample Flowchart for Receiving Serial Data (2)..................................................... 420
Figure 15.9 Example of SCIF Receive Operation (8-Bit Data, Parity, One Stop Bit)................ 422
Figure 15.10 Example of Operation Using Modem Control (RTS)............................................ 422
Figure 15.11 Data Format in Synchronous Communication ...................................................... 423
Figure 15.12 Sample Flowchart for SCIF Initialization.............................................................. 425
Figure 15.13 Sample Flowchart for Transmitting Serial Data .................................................... 426
Figure 15.14 Example of SCIF Transmit Operation................................................................... 427
Figure 15.15 Sample Flowchart for Receiving Serial Data (1)................................................... 428
Figure 15.16 Sample Flowchart for Receiving Serial Data (2)................................................... 428
Figure 15.17 Example of SCIF Receive Operation .................................................................... 429
Figure 15.18 Sample Flowchart for Transmitting/Receiving Serial Data................................... 430
Figure 15.19 RTSIO Bit, RTSDT Bit, and RTS Pin................................................................... 432
Figure 15.20 CTSIO Bit, CTSDT Bit, and CTS Pin................................................................... 433
Figure 15.21 SCKIO Bit, SCKDT Bit, and SCK Pin ................................................................. 434
Figure 15.22 SPBIO Bit, SPBDT Bit, and TxD Pin ................................................................... 434
Figure 15.23 SPBDT Bit and RxD Pin ....................................................................................... 435
Figure 15.24 Receive Data Sampling Timing in Asynchronous Mode ...................................... 437
Section 16 Serial I/O with FIFO (SIOF)
Figure 16.1 Block Diagram of SIOF .......................................................................................... 442
Figure 16.2 Serial Clock Supply................................................................................................. 473
Figure 16.3 Serial Data Synchronization Timing ....................................................................... 474
Figure 16.4 SIOF Transmit/Receive Timing .............................................................................. 475
Figure 16.5 Transmit/Receive Data Bit Alignment .................................................................... 477
Figure 16.6 Control Data Bit Alignment .................................................................................... 478
Figure 16.7 Control Data Interface (Slot Position) ..................................................................... 479
Figure 16.8 Control Data Interface (Secondary FS) ................................................................... 480
Figure 16.9 Example of Transmit Operation in Master Mode.................................................... 483
Figure 16.10 Example of Receive Operation in Master Mode ................................................... 484
Figure 16.11 Example of Transmit Operation in Slave Mode .................................................... 485
Rev. 5.00 Mar. 15, 2007 Page xxvii of xxxviii