SH7619 Datasheet, PDF (673/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 22 Ethernet Physical Layer Transceiver (PHY)
• Register 3 (PHY Identifier 2)
Address
3.15:10
3.9:4
3.3:0
Name
PHY ID
Number b
Model
Number
Revision
Number
Description
Assigned to the 19th through 24th bits of
the OUI.
Six bit manufacturer's model number.
Mode
RW
RW
Four bit manufacturer's revision number. RW
Default
co_reg3_oui_
in[15:0] of
PHYIFSMIR3
• Register 4 (Auto Negotiation Advertisement)
Address
4.15
4.14
4.13
4.12
4.11:10
4.9
4.8
Name
Description
Mode
Next Page
This bit indicates next page is available or RO
not, but this core does not support next
page ability and it is fixed to 0.The write
value should always be 0.
Reserved The write value should always be 0.
RO
Remote Fault 1 = remote fault detected, 0 = no remote RW
fault
Reserved The write value should always be 0.
R/W
Pause
Operation
00 No PAUSE, 01 Asymmetric PAUSE R/W
toward link partner, 10 Symmetric
PAUSE, 11 Both Symmetric PAUSE and
Asymmetric PAUSE toward local device
100Base-T4 Reserved. The write value should always RO
be 0.
100Base-TX 1 = TX with full duplex, 0 = no TX full
RW
Full Duplex duplex ability
4.7
100Base-TX 1 = TX able, 0 = no TX ability
RW
4.6
10Base-T 1 = 10Mbps with full duplex, 0 = no
RW
Full Duplex 10Mbps with full duplex ability
Default
0
0
0
0
00
0
Set by
co_st_mode
[2:0] of
PHYIFCR
1
Set by
co_st_mode
[2:0] of
PHYIFCR
Rev. 5.00 Mar. 15, 2007 Page 635 of 794
REJ09B0237-0500