SH7619 Datasheet, PDF(479/836 Page) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

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SH7619 Datasheet, PDF (479/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

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Section 16 Serial I/O with FIFO (SIOF)

Section 16 Serial I/O with FIFO (SIOF)

This LSI includes a clock-synchronized serial I/O module with FIFO (SIOF) that comprises one

channel. The SIOF can perform serial communication with a serial peripheral interface bus (SPI).

16.1 Features

â¢ Serial transfer

ï£§ 16-stage 32-bit FIFOs (independent transmission and reception)

ï£§ Supports 8-bit data/16-bit data/16-bit stereo audio input and output

ï£§ MSB first for data transmission

ï£§ Supports a maximum of 48-kHz sampling rate

ï£§ Synchronization by either frame synchronization pulse or left/right channel switch

ï£§ Supports CODEC control data interface

ï£§ Connectable to linear, audio, or A-Law or Âµ-Law CODEC chip

ï£§ Supports both master and slave modes

â¢ Serial clock

ï£§ An external pin input or internal clock (PÏ) can be selected as the clock source.

â¢ Interrupts: One type

â¢ DMA transfer

ï£§ Supports DMA transmission and reception by a transfer request for transmission and

reception

â¢ SPI mode

ï£§ Fixed master mode can perform the full-duplex communication with the SPI slave devices

continuously.

ï£§ Selects the falling/rising edge of the SCK as data sampling.

ï£§ Selects the clock phase of the SCK as a transmit timing.

ï£§ Selects one slave device.

ï£§ The length of transmit/receive data is fixed to 8 bits.

Rev. 5.00 Mar. 15, 2007 Page 441 of 794

REJ09B0237-0500

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