SH7619 Datasheet, PDF (118/836 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7619 Series

Section 5 Exception Handling
Types
Illegal slot instruction
General illegal instruction
Stack State
SP →
Address of
delayed branch instruction
SR
32 bits
32 bits
SP →
Address of
general illegal instruction
SR
32 bits
32 bits
Rev. 5.00 Mar. 15, 2007 Page 80 of 794
REJ09B0237-0500