GMS30C7201 Datasheet, PDF (59/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

7.2 Block Diagram
PMU & PLL
nRESET
nPOR
nPMWAKEUP
RTC Evt
MRING
CLK4K
SAC Kref
nIRQ
PMAD APOK
PMBAT OK
nFIQ
AGNT PMU
PMU
registe rs
BCLK, BnRES
generator
ASB
inter fac e
PMU
state
machine
PL
(VCL
PLL
CC L
16
PLL
F CL
ASB
BnRESOut
Fas tB us
FCLK S our ce
BCLKSource
V CLK S ourc e
CCLKSource
S RE Qr ef
nP MUir q
PLLtst[1:0]
AREQPMU
Figure 7-1: Block Diagram
Sub-Block Descriptions
CLOCK generator
The CLOCK generator module is responsible for controlling the PLL’s and gating clocks while
the outputs of the PLLs are uncertain and to ensure that clocks are available during test modes
and during RESET sequences.
GMS30C7201 Data Sheet
7-3