GMS30C7201 Datasheet, PDF (264/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

Slow AMBA Peripherals
PMPSD
Multi-function Pin Selection Register for PORTD. Bits set in this 4-bit
read/write register will select the corresponding pin to become a PIO pin.
13-36
PMPSD
Value
Description
Bit 0
0
1
BCLK
PORTD bit[0]
Bit 1
0
1
nRCS3
PORTD bit[1]
Bit 2
0
1
nRCS4
PORTD bit[2]
Bit 3
0
1
nRCS5
PORTD bit[3
Table 13-27: PIO multi-function pin selection for PORT D
Register memory map
The base address of the PIO is not fixed and may be different for any particular system
implementation. However, the offset of any particular register from the base address is
determined.
Address
PIO Base + 0x00
PIO Base + 0x04
PIO Base + 0x08
PIO Base + 0x0C
PIO Base + 0x10
PIO Base + 0x14
PIO Base + 0x18
PIO Base + 0x20
PIO Base + 0x24
PIO Base + 0x28
PIO Base + 0x2C
PIO Base + 0x30
PIO Base + 0x34
PIO Base + 0x38
PIO Base + 0x40
PIO Base + 0x44
Access
(R/W)
R/W
R/W
R/W
R
R/W
W
R/W
R/W
R/W
R/W
R
R/W
W
R/W
R/W
R/W
Initial
Value
0x00
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0xFF
Name
PADR
PADDR
PAIM
PAIS
PAIE
PAIC
PAIP
PBDR
PBDDR
PBIM
PBIS
PBIE
PBIC
PBIP
PCDR
PCDDR
Register Description
Port A Data Register
Port A Direction Register
Port A Interrupt Mask Register
Port A Interrupt Status Register
Port A Interrupt Edge Mode Register
Port A Interrupt Clear Register
Port A Interrupt Polarity Register
Port B Data Register
Port B Direction Register
Port B Interrupt Mask Register
Port B Interrupt Status Register
Port B Interrupt Edge Mode Register
Port B Interrupt Clear Register
Port B Interrupt Polarity Register
Port C Data Register
Port C Direction Register
Table 13-28: PIO register memory map
GMS30C7201 Data Sheet