GMS30C7201 Datasheet, PDF (290/352 Pages) Hynix Semiconductor – 60MHz operation frequency Low power consumption

Slow AMBA Peripherals
TIR (Test Register for Input) is a 5-bit write-only register defined for test purposes. This register
allows simulation of input signals to the block, as well as the generation of a special test clock
signal for use with production test vectors.
Bit
Name
4
TNFLAG
3
TSCLK
2
TSDFS
1
TSDI
0
TRING
Function
Mode select bit
0 : Normal operation mode
1 : Test mode
Programmable serial clock for test
Programmable data frame sync. for test
Programmable serial data input for test
Programmable ring input for test
Table 13-47: TIR bit functions
TOR (Test Register for Output) is a 3-bit read-only register defined for test purposes. This
register allows simulation of input signals to the block, as well as the generation of a special test
clock signal for use with production test vectors.
Bit
Name
2
TSDO
1
TNCON
0
TRLY
Function
Serial data output line
Serial control/data input select output line
Relay control output line
Table 13-48: TOR bit functions
Register memory map
The base address of the AFE interface is selectable by software. The offset of any particular
register from the base address is shown below.
Address
AFE Base
AFE Base + 0x04
AFE Base + 0x08
AFE Base + 0x0C
AFE Base + 0x10
AFE Base + 0x14
*AFE Base + 0x20–0x3C
*AFE Base + 0x40–0x5C
Register
CR
SR
RVR
UARTCR
TIR
TOR
TX
RX
Read location
Write location
Control Register
Control Register
Status Register
Reference Value Register
UART Control Register
UART Control Register
TIR
TOR
Transmit Data Register
Receive Data Register
Table 13-49: AFE Interface register memory map
Note: The asterisk denotes that access to any address in the range produces the same result.
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GMS30C7201 Data Sheet